The present invention relates in general to integrated circuits, and more particularly to integrated circuit transistors having an increased Early voltage.
Advancements in semiconductor technology have increased the number of transistors which can be manufactured on an integrated circuit die and resulted in a corresponding increase in the functionality of the circuits. In many cases, a single integrated circuit die combines metal-oxide-semiconductor (MOS) field effect transistors for digital processing and bipolar transistors for analog processing on a single die. For example, wireless communications devices such as cellular telephones and pagers may use digital MOS circuits to process incoming and outgoing data while audio signals are processed with analog bipolar circuits.
The increased functionality and operating speed of the digital circuits typically is achieved by fabricating transistors with shallower junctions and smaller surface dimensions, which has the added advantages of reducing die size and power consumption. However, shallower junctions have a disadvantage of reducing the Early voltage, or collector impedance, of bipolar transistors, which lowers circuit performance. The voltage gain of an amplifier stage often is determined by the Early voltage of bipolar transistors.
Prior art integrated circuits that combine MOS and bipolar transistors on a die produce bipolar transistors with low Early voltages and, as a consequence, amplifiers with low gain. These integrated circuits either utilize additional amplifier stages to make up for the reduced gains or increase the complexity of the manufacturing process to increase the Early voltage of the bipolar transistors. Both approaches increases the manufacturing cost of the integrated circuit and the communications device in which it is used.
Hence, there is a need for an integrated circuit transistor and method which increases the Early voltage of a bipolar transistor to increase the performance an integrated circuit without increasing its cost.